As shown in the figure above, the role of smmu is similar to that of mmu.
The role of mmu is to translate the page table for the cpu to convert the virtual address of
the process into a physical address that the cpu can recognize.
In the same way, the role of smmu is to translate the address requested by
DMA for the device into a physical address that the device can actually use, but when smmu bypasses,
the device can also directly use the physical address for DMA.
SMMU:
The important data structure of smmu for DMA address translation is stored in memory.
The register of smmu stores the base address of these tables in memory.
The first is StreamTable (STE). This ste table contains both stage1 translation.
The table structure also contains the translation structure of stage2.
The so-called stage1 is responsible for the conversion from VA to PA, and
stage2 is responsible for the conversion from IPA to PA.
Stream Table Entry:
we will focus on the structure of this STE and how it is organized in memory.
For smmu, a smmu can serve many devices.
Therefore, in order to manage each device separately in smmu, smmu gives each device a ste entry.
How does the device locate the ste entry? For a smmu, we give each device he manages a unique device id,which is also called stream id; for the case of fewer devices, our smmu's ste table obviously only needs to be one-dimensional The array is fine, as shown below.
Note that the linear table used by ste here is not really determined by the number of devices,
but is written in the ID0 register of smmu, which is configured. This structure is basically not used for smmu.
In the case of a large number of devices, we can use a two-layer ste table structure for smmu to be more precise, as shown in the following figure.
The structure here is actually very similar to the page table of our mmu. In arm smmu v3,
our first-level directory desc has enough directories.
The size is 8 (STRTAB_SPLIT) bits, which is the high 8 bits of the stream id, and the stream id remains. The lower low bits are all used to address the real ste entry of the second layer.
After introducing the two structures of the ste table of the management device in smmu,
let’s take a look at the specific structure of the ste table and what is the mystery inside it.
The red box is the complete picture of a ste entry in smmu.
It can be seen from the red box that this ste entry manages the data structure of stage1 and stage2 at the same time,config is the configuration item related to ste, this No need to understand or memorize.
If you don't know, just check the manual of smuv3. The VMID in it refers to the virtual machine ID.
Here we focus on S1ContextPtr and S2TTB.
S1ContextPtr:
The directory structure of a Context Descriptor pointed to by this S1ContextPtr.
This picture only draws one for better understanding. In our arm,
if there is no virtual machine involved, the translation of either the cpu or smmu address is from va->pa/iova ->pa, we call it stage1, that is, it does not involve virtual, just a stage translation.
Important CD table, after reading this, would you ask a question,
why do we use CD table in smmu? The reason is this, a smmu can manage many devices,
so the ste table is used to distinguish the data structure of each device, and each device has a ste table.
If there are multiple tasks running on each device, and these tasks use different page tables at the same time, how to manage it? right? So smmu uses a CD (Context Descriptor) table to manage each page table.
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