According to I2C standards, master can connect with many slaves but with different address. Slave with same address will bring the conflict in state machine of master. Resulting transmission error. This will cause at 9th clock when both slaves will try to pull down SDA.
Practically speaking, master is least bothered if it gets ACK on each 9th clock cycle. If the slaves are identical, like I2C memory from Microchip. Then, it is possible to access both slaves at time.
Every vendor tries to comply with I2C standards though few of the things goes as implementation specific. It means vendor can design however it wish to. So, if you keep different slaves, there are chances that pulling down from slave side will change. This will bring failures in master state machine.
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